发明名称 |
Gate-equivalent-potential circuit and method for I/O ESD protection |
摘要 |
A gate-equivalent-potential circuit and method for an I/O pad ESD protection arrangement including used and unused MOS fingers connected to the I/O pad comprises a switch connected between the gates of the MOS fingers, an ESD detector connected to the switch to turn on the switch upon an ESD event and a gate-modulated circuit connected to the gate of the unused finger to couple a voltage thereto to reduce the triggering voltage of the transistors within the fingers.
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申请公布号 |
US2003235022(A1) |
申请公布日期 |
2003.12.25 |
申请号 |
US20020266572 |
申请日期 |
2002.10.09 |
申请人 |
LAI CHUN-HSIANG;LIU MENG-HUANG;SU SHIN;LU TAO-CHENG |
发明人 |
LAI CHUN-HSIANG;LIU MENG-HUANG;SU SHIN;LU TAO-CHENG |
分类号 |
H01L27/02;(IPC1-7):H02H3/22 |
主分类号 |
H01L27/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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