发明名称 Test method for yielding a known good die
摘要 A semiconductor wafer is cut to singulate integrated circuit dice formed on the wafer. A die pick machine then positions and orients the singulated dice on a carrier base such that signal, power and ground pads formed on the surface of each die reside at predetermined positions relative to landmarks on the carrier base the die pick machine optically identifies. With the dice temporarily held in place on the carrier base, they are subjected to a series of testing and other processing steps. Since each die's signal pads reside in predetermined locations, they can be accessed by appropriately arranged probes providing test equipment with signal access to the pads during tests. After each test, a die pick machine may replace any die that fails the test with another die, thereby improving efficiency of subsequent testing and other processing resources.
申请公布号 US2003237061(A1) 申请公布日期 2003.12.25
申请号 US20020177367 申请日期 2002.06.19
申请人 FORMFACTOR, INC. 发明人 MILLER CHARLES A.;COOPER TIMOTHY;HATSUKANO YOSHIKAZU
分类号 G01R1/06;G01R31/28;G11C29/00;G11C29/56;(IPC1-7):G06F17/50;H01L29/40 主分类号 G01R1/06
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