发明名称 |
Efficient design of substrate triggered ESD protection circuits |
摘要 |
A semiconductor device is designed with a common supply voltage terminal (330). A plurality of standard cells (360-364), each having a plurality of leads (308,326) is connected to the common supply terminal. A plurality of connecting leads (322-324) corresponding to respective standard cells is coupled between at least two leads of the plurality of leads.
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申请公布号 |
US6667865(B2) |
申请公布日期 |
2003.12.23 |
申请号 |
US20010864506 |
申请日期 |
2001.05.24 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
DUVVURY CHARVAKA;RAMASWAMY SRIDHAR |
分类号 |
H01L27/02;(IPC1-7):H02H9/00 |
主分类号 |
H01L27/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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