Semiconductor memory device having redundancy structure with defect relieving function

摘要

Redundancy decoders corresponding to a plurality of redundancy circuits, each of which is for relieving a defective memory cell, are classified into a high-priority redundancy decoder used with a higher priority and the other low-priority decoders. When a defective address stored inside is designated as an accessing object, each of the low-priority decoders activates a corresponding redundancy circuit, except for the case where a defective address stored in the high-priority redundancy decoder agrees with an address signal.