发明名称 Process and apparatus for manufacturing semiconductor device
摘要 As the size of the semiconductor devices decreases, the relative positional difference between a circuit at an exposure area and an alignment mark due to the aberrations and distortions of lenses and the reticle writing error can not be neglected. Images of circuit patterns having a very small size which are laminated are detected using lights having two different wavelengths. Alignment error is calculated from the relationship between the phase difference of images and the alignment error at each wavelength. The alignment error which affects the yield can be detected by directly measuring the alignment error of the circuit in the exposure area including the influence of the aberrations and distortions of lenses and the reticle writing error. Proper correction and improvement of the exposure apparatus can be achieved at early phase prior to electrical test.
申请公布号 US6667806(B2) 申请公布日期 2003.12.23
申请号 US20010796613 申请日期 2001.03.02
申请人 HITACHI, LTD. 发明人 YOSHITAKE YASUHIRO;KATO TAKESHI;NAKATA TOSHIHIKO
分类号 G03F9/00;G01B11/03;G03F7/20;H01L21/027;H01L21/66;(IPC1-7):G01B11/00;G01B11/14;G03C5/00 主分类号 G03F9/00
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