发明名称 Bit-manipulation instructions for packet processing
摘要 Embodiments of the invention relate to bit manipulation instructions that perform efficient bit manipulation operations for packet processing applications. In one embodiment, a bit manipulation instruction for use in packet processing includes a control. In response to the control, the bit manipulation instruction selects a plurality of bits from a source register and writes the selected plurality of bits into a destination register in a manner designated by the control. In an exemplary environment, the bit manipulation instruction may be implemented by a packet processor core of packet processor in a network device. In particular, five bit manipulation instructions for bit extraction, bit packing, bit setting, bit unpacking, and bit matching operations will be disclosed. These instructions are particularly useful for packet processing applications.
申请公布号 US2003231660(A1) 申请公布日期 2003.12.18
申请号 US20020172196 申请日期 2002.06.14
申请人 VINNAKOTA BAPIRAJU;MOHAMMADALI SALEEM;ALBEROLA CARL 发明人 VINNAKOTA BAPIRAJU;MOHAMMADALI SALEEM;ALBEROLA CARL
分类号 H04L29/06;(IPC1-7):H04J3/00 主分类号 H04L29/06
代理机构 代理人
主权项
地址