发明名称 SEMICONDUCTOR WAFER INCLUDING MESHED OXIDE LAYER, FABRICATING METHOD THEREOF AND ISOLATION METHOD USING THE SAME
摘要 PURPOSE: A method for fabricating a semiconductor wafer including a meshed oxide layer is provided to easily perform an electrical isolation by eliminating a part of a silicon epitaxial layer used as an electrode even if the integration of a semiconductor device increases, and to control breakdown of the semiconductor device by preventing bulk punch-through. CONSTITUTION: An insulation layer and a mask layer are sequentially formed on a silicon substrate(110). The mask layer is patterned to form a mask layer pattern with meshed openings exposing a part of the insulation layer. An etch process using the mask layer pattern as an etch mask is performed to form an insulation layer pattern from which the exposed portion of the insulation layer is removed. The mask layer pattern is eliminated. The exposed portion of the silicon substrate is removed by performing an etch process using the insulation layer pattern as an etch mask. The insulation layer pattern is removed. An oxide process is performed to form an oxide layer in a portion where the exposed portion of the silicon substrate is eliminated.
申请公布号 KR20030094741(A) 申请公布日期 2003.12.18
申请号 KR20020032014 申请日期 2002.06.07
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, JI YEONG
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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