发明名称 |
Method and arrangement for rapid silicon prototyping |
摘要 |
A rapid silicon processing arrangement significantly decreases the time from initial design to market introduction. Consistent with one embodiment of the present invention, the rapid silicon processing arrangement uses a deconfigurable and extendible reference-chip development platform that includes a programmable device such as an electronically reconfigurable gate array and an off-platform bus for communicating with external devices. The reference-chip development platform can be deconfigured by deselecting communicative activity by one or more of functional block macros. The external devices can be used with the reference-chip development platform to test a hardware representation of the synthesized subset of the functional block macros in the programmable device within the reference-chip development platform as extended by the off-platform bus. The approach significantly decreases the development time, from initial design to market introduction.
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申请公布号 |
US6665855(B2) |
申请公布日期 |
2003.12.16 |
申请号 |
US20010016731 |
申请日期 |
2001.12.11 |
申请人 |
KONINKLIJKE PHILIPS ELECTRONICS N.V. |
发明人 |
PAYNE ROBERT;BAPST MARK;PONTIUS TIMOTHY |
分类号 |
G06F17/50;(IPC1-7):G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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