发明名称 |
Method for forming damascene metal gate |
摘要 |
The present invention relates to a method of forming a damascene gate electrode of highly integrated MOS transistor capable of easily removing a dummy polysilicon layer. The disclosed comprises the steps of forming a dummy gate insulating layer and a polysilicon layer for a dummy gate on a wafer; forming an interlayer insulating layer on the wafer; polishing the interlayer insulating layer to expose a top surface of the dummy polysilicon layer; and wet etching the exposed dummy polysilicon layer using a spin etching process.
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申请公布号 |
US6664195(B2) |
申请公布日期 |
2003.12.16 |
申请号 |
US20010974811 |
申请日期 |
2001.10.12 |
申请人 |
HYNIX SEMICONDUCTOR, INC. |
发明人 |
JANG SE AUG;SUN JUN HYEUB;CHOI HYUNG BOK |
分类号 |
H01L29/417;H01L21/28;H01L21/302;H01L21/306;H01L21/3065;H01L21/3213;H01L21/336;H01L21/461;H01L21/8238;H01L29/78;(IPC1-7):H01L21/302 |
主分类号 |
H01L29/417 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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