发明名称 |
Buffer, buffer operation and method of manufacture |
摘要 |
An integrated circuit includes an output buffer operable to drive an output node. The output buffer may comprise a MOSFET having a JFET integrated within a portion of a drain region of the MOSFET. The JFET may comprise a gate of second conductivity formed in semiconductor material of first conductivity type, which is contiguous with the drain region for the MOSFET. A voltage shaping circuit may control a bias of the JFET gate in accordance with the voltage levels of an output node and a predetermined output impedance.
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申请公布号 |
US2003227034(A1) |
申请公布日期 |
2003.12.11 |
申请号 |
US20030383442 |
申请日期 |
2003.03.06 |
申请人 |
DAVIS JEFFREY B. |
发明人 |
DAVIS JEFFREY B. |
分类号 |
H01L27/07;H01L27/098;H03K17/567;H03K19/003;(IPC1-7):H01L29/80 |
主分类号 |
H01L27/07 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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