HIGH SPEED SAMPLING CIRCUIT FOR DIGITAL PROTECTIVE RELAY

摘要

PURPOSE: A high speed sampling circuit for a digital protective relay is provided to perform easily an analog to digital conversion function by using a CPLD(Complex Programmable Logic Device). CONSTITUTION: A high speed sampling circuit for a digital protective relay includes a multiplexer controller(6), an A/D controller(7), a RAM controller(8), an interrupt controller(9), and a plurality of controllers(11). The multiplexer controller(6) outputs a channel command to a multiplexer(2) and transfers only a signal of a desired channel to an A/D converter(3). The A/D controller(7) is used for transferring an output of the A/D converter(3) to a dual port RAM(4). The RAM controller(8) is used for performing a write operation to store the output of the A/D converter(3) to a first bank of the dual port RAM(4). The interrupt controller(9) is used for generating an interrupt signal if a bank indication signal is generated from the first bank of the dual port RAM(4). The controllers(11) is used for controlling operations of the multiplexer controller(6), the A/D controller(7), the RAM controller(8), and the interrupt controller(9).