发明名称 Wiring design method of integrated circuit device, system thereof, and program product thereof
摘要 An object of this invention is to provide a wiring design method of integrated circuit device capable of determining a layout without such a problem as congestion of wirings efficiently upon determination of the wiring layout in the integrated circuit device, system thereof and program product thereof. In the wiring design method for determining the route of wiring between a cell and another cell in the integrated circuit device, first, a region in which wirings are to be placed is divided vertically and horizontally (S102). Which divided regions each wiring should cross is determined (S103). The numbers of the wirings crossing the border of each divided region are equalized (S104). If the length of a side of each divided region is larger than a predetermined length (No in S105), that region is further divided (S102). If the length of a side of each region is smaller than the predetermined length, the route at that time is adopted as the rough wiring route of each wiring (S106).
申请公布号 US2003227032(A1) 申请公布日期 2003.12.11
申请号 US20030361679 申请日期 2003.02.11
申请人 FUJITSU LIMITED 发明人 NAWA TAKANORI;HOSONO TOSHIKATSU;YONEDA TAKASHI
分类号 G06F17/50;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):H01L27/10 主分类号 G06F17/50
代理机构 代理人
主权项
地址