Plate line non-drive improved reading method for a ferroelectric memory

摘要

A ferroelectric memory in which, upon reading data from a memory cell (MC1, MC2), first and second bit lines (BL, XBL) are precharged beforehand at a grounding voltage (VSS). Then at a start of the reading, a predetermined amount of direct-current bias electricity is supplied to the first and second bit lines (BL, XBL) for a predetermined period of time by a direct-current bias electricity supply circuit (BA). Thereafter, a sense amplifier (SA) is activated. <IMAGE>