发明名称 Method of repeater insertion for hierarchical integrated circuit design
摘要 A method of repeater insertion in a hierarchical integrated circuit includes defining an initial floorplan for a parent macro at a parent level in a hierarchical circuit design; passing outline and pin locations from the parent macro to a child macro sharing a common area with the parent macro; defining or modifying a floor plan for the child macro at a child level in the hierarchical circuit design in response to the outline and pin locations passed from the parent macro; passing physical restrictions in the child macro from the child macro to the parent macro; determining a location for a cell at the parent level of the hierarchical circuit design in an area of the parent macro shared by the child macro in response to the physical restrictions passed from the child macro; passing physical constraints in the parent macro associated with placement and routing of the cell from the parent level to the child macro; and generating an abstract representation for the child macro at the child level that includes an area cut out of the child macro corresponding to the location of the cell.
申请公布号 US6662349(B2) 申请公布日期 2003.12.09
申请号 US20020086232 申请日期 2002.02.27
申请人 LSI LOGIC CORPORATION 发明人 MORGAN DAVID A.;BLINNE RICHARD D.;JENSEN JAMES A.;TREMEL CHRISTOPHER J.
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址