| 摘要 |
The present invention generally relates to nonvolatile ferroelectric memory control devices, and more specifically, to a nonvolatile ferroelectric memory control device suitable for an embedded memory. In the nonvolatile ferroelectric memory control device of the present invention, a column address area is arranged in the least significant bit region. When a column address is accessed in the same row address, an address transition detecting signal is not generated. According to the present invention, an internal data register array is arranged and a repeated access address controls the data register array so that data stored in the register may be immediately outputted. Accordingly, the nonvolatile ferroelectric memory control device of the present invention can reduce power consumption when the FRAM is used as a program memory in a SOC (System on Chip) structure and extends life of FRAM by decreasing power stress applied to cells.
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