| 摘要 |
An address counter and address counting method is provided for enhancing an operational speed by forming a path for outputting a corresponding output address as soon as an external address or a previous internal address is inputted and further generating both a path for the case when a parity signal having a high state is inputted and a path for the case when a parity signal having a low state is inputted. While the paths are being produced, the parity signal is generated and the next internal address is immediately outputted in response to the generation of the parity signal. Moreover, an operation of latching the next address is terminated as soon as the parity signal is generated.
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