| 摘要 |
A memory subsystem package has a memory controller interface ASIC (application specific integrated circuit) and a plurality of memory modules. The ASIC has a bi-directional serial protocol i2C communication bus to off chip drivers for monitoring temperature and for adjusting the environment surrounding the package by controlling fans using fan switches and variable voltage controls. In addition there is provided an Alternating Current Built in Self Test (AC BIST) with variable data receiver voltage reference for performing high-speed AC memory subsystem self-test for that ASIC enabling writing of pseudo-random patterns to memory, reading them back and comparing the expected results at hardware speeds. Vref can be made to vary across its allowable range during AC self test to provide improved coverage. The system monitors Vddq during normal system operation using an ADC. The system varies Vref as a function of Vddq, using a combination of a DAC and ADC. The system varies Vref as a function of Vddq, such that Vref=1/m*Vddq+OFFSET, where m can be 1, 2, 4, or 8, and where OFFSET can be positive or negative ranging from 1/n*Vddq to n-1/n*Vddq, where n is the voltage granularity of the DAC.
|
