| 摘要 |
A frequency-adjustable oscillator suitable for digital signal clock synchronization comprises a crystal oscillator circuit for generating a driving signal and having a voltage-variable control input for adjusting a frequency of the driving signal, a phase detector circuit for generating a phase offset signal, a filter which operates on the phase offset signal to produce a VCO control signal, a voltage controlled oscillator circuit operably linked to the filter and responsive to the VCO control signal for generating an analog controlled-frequency signal, a frequency divider circuit for generating a reduced frequency feedback signal in response to the controlled-frequency signal, and a sinewave-to-logic level translator circuit for generating a digital output signal having substantially the same frequency as the controlled-frequency signal. The crystal oscillator circuit includes a discrete varactor responsive to the control input and a fundamental mode AT-cut quartz resonator. The frequency-adjustable oscillator operates according to specific operating output frequency to control input relationship.
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