发明名称 VERTICAL FIELD EFFECT TRANSISTOR
摘要 PROBLEM TO BE SOLVED: To provide vertical MOS where BVDS is improved without increasing on-resistance with a simple structure. SOLUTION: A plurality of unit cells 10 formed on an N<SP>-</SP>type epitaxial layer 12 which is deposited on an N<SP>+</SP>semiconductor substrate 11 and whose impurity concentration is lower than the semiconductor substrate 11 are regularly arranged. A trench 13 whose depth is Xa and whose width is (h) is formed around the unit cell 10. A gate electrode 25 is buried in the trench 13 through a gate oxide film 24 whose film thickness is tox. The unit cell 10 is provided with a P-type base region 21 whose depth is Xb, a source region 22, a high concentration P-type region which is formed in a center part and whose depth is Xc and the gate insulating film 24 formed in a face opposite to the trench 13. Xb<Xa and Xa≈Xc. When a shortest distance between the trench 13 and the high concentration P-type region 23 is set to be Ltd, Ltd≤×(Xa-Xb). COPYRIGHT: (C)2004,JPO
申请公布号 JP2003347545(A) 申请公布日期 2003.12.05
申请号 JP20020155246 申请日期 2002.05.29
申请人 NEC ELECTRONICS CORP 发明人 OTANI KINYA
分类号 H01L21/336;H01L29/10;H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L21/336
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