发明名称 VOLTAGE CONVERSION CIRCUIT AND SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To reduce the delay time of a signal between an input terminal and an output terminal. SOLUTION: The voltage conversion circuit includes: an inverter circuit 15 acting as an inverting circuit for outputting a signal at a node C being a first inverted signal resulting from inverting an output signal of a buffer circuit 10 being a standby/operating control signal; a tri-state circuit 20 for outputting an operating signal or a standby signal in response to an input signal to a node B on the basis of the output signal from the buffer circuit 10 and an output signal from the inverter circuit 15; and a voltage output circuit 25 for receiving the signal of the node B being the standby signal to fix a voltage conversion output level to a prescribed voltage level and receiving the signal of the node B being the operating signal to convert the input signal voltage into the prescribed voltage and outputting the result on the basis of the input signal and the output signal from the inverter circuit 15. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003347924(A) 申请公布日期 2003.12.05
申请号 JP20020154705 申请日期 2002.05.28
申请人 SHARP CORP 发明人 MORIKAWA YOSHINAO
分类号 H03K19/0185;H03K3/012;H03K3/356;(IPC1-7):H03K19/018 主分类号 H03K19/0185
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