| 摘要 |
PROBLEM TO BE SOLVED: To reduce capacitance between adjacent data electrodes and curtail power consumption accompanying data pulse impression by patterning dielectric layers. SOLUTION: The dielectric layers 11 covering the data electrodes 6 are patterned in strips, gaps are to be made between each dielectric layer 11 and adjacent longitudinal partition walls, and the dielectric layers 11 are formed to be covered with phosphor layers 10. COPYRIGHT: (C)2004,JPO
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