发明名称 On chip debugging method of microcontrollers
摘要 A microcontroller 100 comprises an external interface terminal group 102 for executing transmission and reception of data relative to an outside, a data transmit/receive section 104, and a DMA controller 110 comprised of an address register 112 for storing therein an address of a hard ware serving as an object to be accessed by DMA, registers (113, 114) for executing read/write by the DMA, a control flag 111 for controlling the start of the DMA, and a timing controller 116 of the DMA. The microcontroller 100 further comprises a register 170 for storing therein flag information for determining whether access can be executed or not by the DMA and a unit for outputting a bus state recognition signal 101 indicating whether a bus state is rendered in a state to be accessed or not by the DMA, wherein when a DMA control flag 170 indicates that access can be executed by the DMA, and the bus state recognition signal indicates that the bus can be occupied by the DMA, and the control flag inside the DMA controller indicates that access is started by the DMA, the built-in RAM or registers are accessed under the control of the timing controller of the DMA inside the DMA controller so that data is read from the RAM or registers to the outside of the microcontroller or data is written to the RAM or registers from the outside.
申请公布号 US2003226081(A1) 申请公布日期 2003.12.04
申请号 US20020259861 申请日期 2002.09.30
申请人 FUJIUCHI HISASHI 发明人 FUJIUCHI HISASHI
分类号 G06F11/28;G01R31/3177;G06F11/22;G06F13/28;G06F15/78;(IPC1-7):G01R31/28 主分类号 G06F11/28
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