发明名称 Adjustment and calibration system to store resistance settings to control chip/package resonance
摘要 A adjustment and calibration system for reducing an impedance of a power supply path of an integrated circuit is provided. The power supply path includes a first power supply line and a second power supply line to provide power to the integrated circuit. At least a digital potentiometer connected between the first power supply line and the second power supply line is adjusted to reduce the impedance of the power supply path. Control information, representative of a desired value for the digital potentiometer, is stored in a storage device. The control information stored in the storage device is subsequently selectively read out in order to adjust the digital potentiometer to a state corresponding to the control information.
申请公布号 US2003222655(A1) 申请公布日期 2003.12.04
申请号 US20020160349 申请日期 2002.05.31
申请人 GAUTHIER CLAUDE R.;AMICK BRIAN W. 发明人 GAUTHIER CLAUDE R.;AMICK BRIAN W.
分类号 G06F1/18;G06F1/26;(IPC1-7):G01R35/00 主分类号 G06F1/18
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