发明名称 |
Clock extraction circuit |
摘要 |
A clock extraction circuit includes an edge detection unit for detecting a phase at which a trailing edge or a leading edge of input data is coincided with each other, and a phase judgement unit for comparing an edge position of the detected input data and a position of an input clock and for putting a weight, wherein the weight is put so that a shifting amount of the input clock is varied depending on a difference between the edge position of the input data and the position of the input clock.
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申请公布号 |
US2003226070(A1) |
申请公布日期 |
2003.12.04 |
申请号 |
US20020294682 |
申请日期 |
2002.11.15 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
FUKAO TETSUHIRO;KONDOU HARUFUSA;ISHIWAKI MASAHIKO;KOHAMA SHIGEKI |
分类号 |
H04L7/02;H04L7/033;(IPC1-7):G11B5/00;G01R31/28;G06K5/04;G11B5/00;G11B20/20 |
主分类号 |
H04L7/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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