发明名称 PROCESSOR SYSTEM, TASK CONTROL METHOD ON COMPUTER SYSTEM, COMPUTER PROGRAM
摘要 A processor system having a mechanism for recording the timing at which a processing with high degree of emergency is started. If the processor system enters a critical section during a processing with low degree of emergency, it refers to the record and checks if a processing with high degree of emergency is to be started or not during the execution of the critical section. If any processing with high degree of emergency is not to be started, the processor system enters the critical section; if to be started, the processor system performs a control so that the entrance into the critical section is postponed until the processing with high degree of emergency is ended. In an environment where tasks are being executed, exclusive control in a critical section can be preferably carried out.
申请公布号 WO03100613(A1) 申请公布日期 2003.12.04
申请号 WO2003JP04886 申请日期 2003.04.17
申请人 SONY CORPORATION;TOGAWA, ATSUSHI 发明人 TOGAWA, ATSUSHI
分类号 G06F9/52;G06F9/46;G06F9/48;G06F9/50;(IPC1-7):G06F9/50 主分类号 G06F9/52
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