发明名称 |
Double-conversion television tuner using a delta-sigma fractional-N PLL |
摘要 |
A double-conversion tuner receives an RF signal having a number of channels and down-converts a selected channel from the plurality of channels. The double-conversion tuner includes a first mixer configured to up-convert the RF signal to a first IF signal using a first local oscillator signal. A first local oscillator includes a delta-sigma fractional-N phase lock loop to produce the first local oscillator signal. The delta-sigma fractional-N phase lock loop is configured to perform fine-tuning of the first local oscillator signal and to have a wide tuning range sufficient to cover the number of channels. A bandpass filter is configured to select a subset of channels from said first IF signal. A second mixer is configured to down-convert the subset of channels to a second IF signal using a second local oscillator signal. A second local oscillator generates the second local oscillator signal. The second local oscillator is configured to perform coarse frequency tuning of the second local oscillator signal and has a narrow tuning range relative to said first local oscillator. The delta-sigma fractional-N phase lock loop in the first local oscillator permits implementation of a double-conversion tuner with improved phase noise for a given amount of power and complexity. <IMAGE>
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申请公布号 |
EP1367709(A2) |
申请公布日期 |
2003.12.03 |
申请号 |
EP20030012507 |
申请日期 |
2003.06.02 |
申请人 |
BROADCOM CORPORATION |
发明人 |
WAKAYAMA, MYLES H. |
分类号 |
H03L7/197;H03D7/16;H03L7/07;H03L7/10;H03L7/185;(IPC1-7):H03D7/16 |
主分类号 |
H03L7/197 |
代理机构 |
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地址 |
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