发明名称 BOOTSTRAP CIRCUIT AND PLANAR DISPLAY DEVICE USING THE SAME
摘要 <P>PROBLEM TO BE SOLVED: To prevent parasitic capacitance from being formed across a control electrode of a transistor and a counter electrode placed opposite thereto. <P>SOLUTION: A source electrode 53 of a transistor Tr1 is extended up to the position of a gate electrode 51. With this structure, the part of the gate electrode 51 exposed to the counter electrode 14 is covered by the source electrode 53, therefore, the parasitic capacitance Ccom is prevented from being formed across the gate electrode 51 and the counter electrode 14. <P>COPYRIGHT: (C)2004,JPO
申请公布号 JP2003344873(A) 申请公布日期 2003.12.03
申请号 JP20020151453 申请日期 2002.05.24
申请人 TOSHIBA CORP 发明人 KITANI MASAKATSU;MORITA TETSUO
分类号 G02F1/1368;G02F1/133;G09F9/30;G09G3/20;G09G3/36;H03K19/0175;H03K19/094 主分类号 G02F1/1368
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