发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS FAILURE ANALYZING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To reduce the test pattern required for analyzing the failure of a semiconductor integrated circuit while enhancing the efficiency of failure analysis by interrupting the operation at a moment at the time of observing the internal condition and making it possible to resume the operation after the internal condition of the semiconductor integrated circuit was observed from the outside thereof. SOLUTION: A shift feedback selector 25 for selecting one of two signals inputted to a scan chain is provided and a signal being inputted from the outside of the semiconductor integrated circuit or an output signal from the scan chain is selected. A scan chain having a small number of flip-flops is provided with additional flip-flops such that the number of the flip-flops becomes constant among the scan chains. COPYRIGHT: (C)2004,JPO
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申请公布号 |
JP2003344502(A) |
申请公布日期 |
2003.12.03 |
申请号 |
JP20020155917 |
申请日期 |
2002.05.29 |
申请人 |
KAWASAKI MICROELECTRONICS KK |
发明人 |
NAKAMURA HIROYUKI |
分类号 |
G01R31/28;H01L21/66;H01L21/822;H01L27/04;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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