发明名称 EPOXY RESIN COMPOSITION AND SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor-sealing epoxy resin composition which causes a small package warpage after reflow in component mounting subsequent to molding with an LOC structure thin semiconductor package at least 50% of which is occupied by the constituent semiconductor element and is excellent in solder reflow resistance when used in various thin semiconductor devices of LOC structure, non-LOC structure, and non-LOC window pad structures for memories. SOLUTION: The epoxy resin composition essentially consists of an epoxy resin containing at least 30 wt.% epoxy resin prepared by glycidyl-etherifying a phenolic resin containing at least 50 wt.% phenolic resin having a trihydroxytriphenylmethane skeleton, a phenol aralkyl resin having a phenylene skeleton, a cure accelerator, and an inorganic filler, wherein the inorganic filler is contained in an amount of 85-92 wt.% based on the entire epoxy resin composition, and the differences between the shrinkage percentage of a cured product of the composition and that of a lead frame and between the shrinkage percentage of the cured product and a semiconductor element are each 0.30% or smaller. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003342447(A) 申请公布日期 2003.12.03
申请号 JP20020150983 申请日期 2002.05.24
申请人 SUMITOMO BAKELITE CO LTD 发明人 ITO SHINGO
分类号 C08L63/00;C08G59/62;C08K3/00;H01L23/29;H01L23/31;(IPC1-7):C08L63/00 主分类号 C08L63/00
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