发明名称 Packet buffer device and packet assembling method
摘要 A packet buffer device and a packet assembling method in a packet transfer module to assemble logical channel-multiplexed asynchronous transfer mode (ATM) cells into packets and to store and output the cells in packet units. The packet buffer device includes a discrete buffer controller to generate a discrete buffer from a common buffer, a buffer type determination unit to determine a buffer type in which to store an ATM cell for each input ATM cell, and a packet buffer controller to assign the ATM cell to the common buffer or to the discrete buffer according to the buffer type. Thus, a common buffer and discrete buffers are dynamically constructed and buffers of respectively differing type can be used for packets of differing service mode. Further, optimal buffer resource usage can be achieved by using the buffer capacity of both a common buffer type and a discrete buffer type to store packets.
申请公布号 US6658014(B1) 申请公布日期 2003.12.02
申请号 US19990389221 申请日期 1999.09.03
申请人 FUJITSU LIMITED 发明人 TEZUKA YASUO
分类号 H04Q3/00;H04L12/56;(IPC1-7):H04L12/54 主分类号 H04Q3/00
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