| 摘要 |
PROBLEM TO BE SOLVED: To provide a decoding apparatus for a semiconductor memory device and a method of enabling the apparatus. SOLUTION: A decoding apparatus calculates an address latch control signal and an internal address under control by an output signal from an address latch section, and prevents delay between an address received by the decoder and a decoder control signal by enabling the decoder responding to a generated decoder control signal. For this purpose, the decoding apparatus is provided with an address latch 20 outputting a first latch address, a second latch address and an internal address latching a received address responding to the address latch control signal, an address transition detector 30 for calculating an address latch control signal and an internal address under control of the first latch address and the second latch address to generate a decoder control signal, and a decoder 40 enabled according to the decoder control signal. COPYRIGHT: (C)2004,JPO
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