| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a memory module in which fluctuation in timing on a signal between signal lines can easily be reduced, which can be miniaturized and in which wiring can be shortened. <P>SOLUTION: In the memory module 1, a plurality of memories 2 mounted on the same face of a flexible substrate 3 are laminated in a state that the flexible substrate 3 is bent. Outer terminals 31 which are electrically connected to a logic IC, and signal lines 32 with almost the same lengths, which electrically connect the outer terminals 31 and the memories 2, are disposed on the flexible substrate 3. <P>COPYRIGHT: (C)2004,JPO</p> |
