| 摘要 |
<P>PROBLEM TO BE SOLVED: To allow selection of clock signals, corresponding to user's specifications to supply them by adjusting the amplitudes, duty ratios and wave form characteristics of rising and falling edges of the output waves, and allow adjusting output waveforms by having a plurality of terminals for outputting different frequencies. <P>SOLUTION: Oscillation signals, obtained from an invertor oscillation circuit 4, are input into an output drive circuit 5. In the driving circuit 5, a control circuit 53 controls a voltage control circuit 52 and a buffer circuit 51, based on control data written into a memory circuit 54 and generates the clock signals having the amplitudes, duty ratios and rising and falling edges of the output waves corresponding to the control data. By configuring the drive circuit 5 with a plurality of voltage control circuits and buffer circuits, clock signals with different wave characteristics can be obtained from a plurality of output terminals, respectively. <P>COPYRIGHT: (C)2004,JPO |
