| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device in which storage data can be read at a high speed without read failure. <P>SOLUTION: This device has a memory transistor group 10 including a plurality of memory transistors connected in series, and a data read line 16 from which data of the memory transistors is outputted. A sense amplifier 17 is connected to the data read line 16. The data read line 16 is discharged to 0V by a transistor 12 for pre-charge. And a transistor 22 for holding a first level controlled by an output of a sense amplifier 17 is connected to the data read line 16 and a transistor 21 for holding a second level is connected between the transistor 21 for holding the first level and 0V. Also, this device is provided with a delay circuit 32 generating a delay signal for turning on the transistor 21 for holding the second level after pre-charging by the transistor 12 for pre- charge is completed. <P>COPYRIGHT: (C)2004,JPO</p> |
