发明名称 Self aligned compact bipolar junction transistor layout and method of making same
摘要 The invention relates to a process of forming a bipolar junction transistor (BJT) that includes forming a topology over a substrate. Thereafter, a spacer is formed at the topology. A base layer is formed from epitaxial silicon above the spacer and at the topology. A leakage block structure is formed in the substrate by out-diffusion from the spacer. Thereafter a BJT is completed with the base layer and the spacer.
申请公布号 US2003219939(A1) 申请公布日期 2003.11.27
申请号 US20030418395 申请日期 2003.04.17
申请人 AHMED SHAHRIAR;BOHR MARK;CHAMBERS STEPHEN;GREEN RICHARD;MURTHY ANAND 发明人 AHMED SHAHRIAR;BOHR MARK;CHAMBERS STEPHEN;GREEN RICHARD;MURTHY ANAND
分类号 H01L21/331;(IPC1-7):H01L21/823 主分类号 H01L21/331
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