发明名称 |
Method of forming a shallow trench isolation structure |
摘要 |
A pad oxide layer and a silicon nitride (SiN) layer are sequentially formed on a silicon substrate. An etching process is then performed to form a trench in the silicon substrate. A sub-atmospheric chemical vapor deposition (SACVD) process is performed to selectively form a first dielectric layer on exposed portions of the silicon substrate within the trench to fill portions of the trench thereafter. Finally, a high density plasma chemical vapor deposition (HDPCVD) process is performed to form a second dielectric layer to fill the remaining space of the trench and cover the silicon substrate.
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申请公布号 |
US6653204(B1) |
申请公布日期 |
2003.11.25 |
申请号 |
US20030248749 |
申请日期 |
2003.02.14 |
申请人 |
UNITED MICROELECTRONICS CORP. |
发明人 |
WU HSIN-CHANG;YANG NENG-HUI;TSAI CHENG-YUAN;LIN WEN-HSUN |
分类号 |
H01L21/316;H01L21/762;(IPC1-7):H01L21/76;H01L21/336;H01L21/31 |
主分类号 |
H01L21/316 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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