| 摘要 |
Disclosed is a semiconductor device using a gate electrode such as an SRAM, wherein the electrode pattern is a formed with fidelity to a reticle pattern through no complicated layout design. The gate electrode pattern is formed in an area smaller than that of a conventional semiconductor device. In a lithographic step using a reticle pattern provided with substantially linear gate electrode patterns, a projecting portion in which at least a part of a contact region is arranged is formed such that it is included in almost the center of a long side of a linear gate electrode pattern and a concave portion facing at least the entire length of the projecting portion is formed such that it is included in a long side opposite to the projecting portion between transistor regions of a reticle pattern.
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