Apparatus and method for providing a smooth transition between two clock signals

摘要

An apparatus and method is disclosed for providing a smooth transition between a first clock signal at a first frequency and a second clock signal at a lower second frequency. A pulse is generated that indicates whether the logic levels of the first and the second clock signals are similar or are different. The rising/falling edges of the pulse are synchronized with the rising/falling edges of the first clock signal. When a change in a logic level of a command signal for switching between the clock signals is detected, a first time period is identified in which the logic levels of the first and the second clock signals are different. The transition between the first clock signal and the second clock signal is allowed immediately after the first time period has ended.