| 摘要 |
PROBLEM TO BE SOLVED: To manufacture a plurality of kinds of CMOS logical cell, in which a driving capacity is secured, by only adding or deleting a wiring pattern without changing the pattern of a diffusion layer or a contact hole. SOLUTION: A plurality of kinds of CMOS logical cell are manufactured by adding or deleting a wiring pattern of a CMOS original cell formed by adjacently arranging a PMOS region IP and an NMOS region IN in mutually plane symmetrically. In the PMOS region IP, an N guard ring is formed around the rim part of an N-type well and is connected to a wiring ring A0 of a first metal layer through a contact 10 while a first circuit 4P is formed at the inside of the ring. The first circuit 4P is provided with P-type regions 41-43, gate lines G1, G2, wiring patterns A1-A5 for the first metal layer, wiring patterns B1-B3 for a second metal layer and interlayer contacts C11-C13, C21-C23, C31, C33. The gate lines G1, G2 are respectively connected to the wiring patterns B1, B3 through the contact while the wiring pattern A1 is connected to the ring A0. COPYRIGHT: (C)2004,JPO
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