| 摘要 |
PROBLEM TO BE SOLVED: To effectively use wiring channels of wiring formed by a damascene method. SOLUTION: In the case that a first cell 1 (0-1, 10-2, 10-3) is used, M1 power source wiring (101-1, 101-2, 102-3) is subjected to layout at a position isolated from a boundary of a cell, so that power source wiring is not combined between cells in layout of a semiconductor integrated circuit. As a result, width of the power source wiring is not changed. Since a rule regarding a gap to wiring adjacent to the wiring can be satisfied in accordance with width of the wiring, the number of wiring channels is not reduced. Hence, the providing ratio of wiring channels and the level of integration of a semiconductor chip are improved. COPYRIGHT: (C)2004,JPO
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