发明名称 |
PSEUDO-RANDOM NUMBER PATTERN GENERATING CIRCUIT |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a pseudo-random number pattern generating circuit capable of realizing a high speed operation even when output bit width is increased and easily being designed even when the output bit width is changed. <P>SOLUTION: The pseudo-random number pattern generating circuit is formed in an integrated circuit, and generates binary sequence pattern data of 2<SP>7</SP>-1 pseudo-random numbers having a plurality of output bit widths by using not an exclusive-OR gate but shift resistors 20 interconnected like a ring. <P>COPYRIGHT: (C)2004,JPO |
申请公布号 |
JP2003330704(A) |
申请公布日期 |
2003.11.21 |
申请号 |
JP20020133168 |
申请日期 |
2002.05.08 |
申请人 |
TOSHIBA CORP |
发明人 |
TANAKA TOSHIO;NAKAGAWA NAOKI |
分类号 |
G06F7/58;G09C1/00;H03K3/84 |
主分类号 |
G06F7/58 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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