发明名称 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device that is low in failure incidence. SOLUTION: As shown in Fig. 1 (a), an IGFET 100 is constituted by using an SOI substrate and is provided with a semiconductor layer 1, an embedded insulating film 2, and another semiconductor layer 3 constituting an active region. A trench 2t is formed around the semiconductor layer 3 and an element isolating region 4 is formed in the trench 2t. In addition, a gate insulating film 5 and a gate electrode 6 are formed one after another and a gate sidewall spacer 7 is formed around the gate electrode 6 on the area of the semiconductor layer 3 which becomes a channel. Moreover, an interlayer insulating film 8 and a contact 9 which comes into contact with the gate electrode 6 through the insulating film 8 are formed on the substrate. The gate width W2 of the IGFET 100 is set to about a half (about 0.5μm) that of a conventional IGFET 500. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003332580(A) 申请公布日期 2003.11.21
申请号 JP20020133715 申请日期 2002.05.09
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YAMAOKA TORU
分类号 H01L21/762;H01L21/336;H01L29/786;(IPC1-7):H01L29/786 主分类号 H01L21/762
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