| 摘要 |
PROBLEM TO BE SOLVED: To increase a power source noise reduction effect and reduce a mounting area. SOLUTION: A re-wiring layer 23 including a wiring layer 24 for a power source and a wiring layer 25 for the ground is formed on a semiconductor integrated circuit chip 21. The respective wiring layers are connected with external electrodes formed on the chip 21 by using connection holes. Positions of the connection holes 26, 27 formed in the wiring layers 24, 25 are adjusted in such a manner that the size and pitch of a junction member formed on the uppermost layer of the re-wiring layer 23 are conformable to sizes and pitches of electrodes of electronic components 22. As a result, the electronic components 22 different in sizes and pitches of electrodes can be mounted on the chip 21. When the electronic components 22 are noise countermeasure components, a wiring length for electrically connecting the components 22 with the chip 21 can be reduced to a minimum. The inductance of the wiring length is reduced, and power source system noise can remarkably be reduced. The mounting area can be also reduced. COPYRIGHT: (C)2004,JPO |
