发明名称 |
SERIAL DATA RECEIVING CIRCUIT |
摘要 |
<p><P>PROBLEM TO BE SOLVED: To obtain a serial data receiving circuit in which suitable data are outputted even when there is jitter in data or a clock. <P>SOLUTION: The serial data receiving circuit is provided with: a serial/ parallel converting circuit 2 for converting oversampling data from an oversampling circuit 1 to parallel data of (n) bits at every (m) bits; and a data selector circuit 12 for simultaneously inputting m×n+αdata addingαdata of the last time or the next time to m×n data from the serial/parallel converting circuit 2, evaluating all the data as candidates possible to be selected and outputting the parallel data of the (n) bits out of these data. <P>COPYRIGHT: (C)2004,JPO</p> |
申请公布号 |
JP2003333110(A) |
申请公布日期 |
2003.11.21 |
申请号 |
JP20020143614 |
申请日期 |
2002.05.17 |
申请人 |
MITSUBISHI ELECTRIC CORP |
发明人 |
HIRAIDE TAKUYA;NAKAO HIROOMI |
分类号 |
H04L25/08;H04L7/00;H04L7/033;(IPC1-7):H04L25/08 |
主分类号 |
H04L25/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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