发明名称 METHOD OF ETCHING A TRENCH IN A SILICON-ON-INSULATOR (SOI) STRUCTURE
摘要 <p>Disclosed herein is a method of etching a trench in silicon overlying a dielectric material which reduces or substantially eliminates notching at the base of the trench, while reducing scalloping on the sidewalls of the trench. The method comprises etching a first portion of a trench by exposing a silicon substrate, through a patterned masking layer, to plasma generated from a fluorine-containing gas. This etching is followed by a polymer deposition step comprising exposing the substrate to plasma generated from a gas, which is capable of forming a polymer on etched silicon surfaces. The etching and polymer deposition steps are repeated for a number of cycles, depending on the desired depth of the first portion of the trench. The final portion of the trench is etched by exposing the silicon to plasma generated from a combination of a fluorine-containing gas and a polymer-forming gas.</p>
申请公布号 WO2003096392(P1) 申请公布日期 2003.11.20
申请号 US2003013639 申请日期 2003.04.30
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