| 摘要 |
The present invention relates to a clamping circuit and a nonvolatile memory device using the same. Each of switching means driven by a gate voltage of a transistor included in a clamping circuit are installed between a drain terminal of the transistor and a terminal of the well in which the transistor is formed. A given bias is applied to the well and the threshold voltage of the transistor is thus lowered. Thus, the operating speed of the transistor can be increased even at a low power supply voltage without additionally using a manufacture process for the low voltage operation. Further, the ripple voltage can be minimized and generation of defect can be thus prevented. As a result, electrical characteristic and reliability of the circuit is improved.
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