发明名称 Bulk input differential logic circuit
摘要 A bulk input differential logic circuit. The circuit outputs a large signal high enough to assert a logic High and Low by variations of the threshold voltage controlled by the bulk input signal and amplification of the sense amplifier. A boost circuit is disposed on the bulk input terminal, which may receive multiple bulk input signals. This makes it possible to use fewer circuit elements and smaller circuit area for a complicated logic operation.
申请公布号 US2003214327(A1) 申请公布日期 2003.11.20
申请号 US20020307371 申请日期 2002.12.02
申请人 HUANG HONG-YI;LIN JING-FU 发明人 HUANG HONG-YI;LIN JING-FU
分类号 H03K19/017;H03K19/096;H03K19/21;(IPC1-7):H03K19/20 主分类号 H03K19/017
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