发明名称 DISTRIBUTED RAM IN A LOGIC ARRAY
摘要 Distributed RAM in a logic array. A single, customizable, logic array fabric provides both gate array logic and RAM functionality simultaneously while substantially maximizing the amount of configurable metal for routing. The extra semiconductor area in the cells of a metal limited device is used to implement general purpose RAM. Common select lines and read/write lines for the RAM are embedded in the base cells so that the configurable metal (whether via or actual metal layer) over the RAM can be used for routing logic.
申请公布号 US2003214322(A1) 申请公布日期 2003.11.20
申请号 US20020150685 申请日期 2002.05.17
申请人 COX WILLIAM D. 发明人 COX WILLIAM D.
分类号 H03K19/177;(IPC1-7):H03K19/177 主分类号 H03K19/177
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