发明名称 SEMICONDUCTOR CLOCKED INTEGRATED CIRCUIT AND ITS ACTIVATION PROCESS
摘要 FIELD: semiconductor integrated circuits activated in parallel or in series. SUBSTANCE: clock signal (CLint) output lead is coupled through respectively controlled change-over facility (MP1, MP2, MP3, MP4) with clock input of respective circuit units (S1. S2, S3, HS) and control inputs of change-over facilities (MP1, MP2, MP3, MP4) are coupled with output of random signal generator (ZSG) so that respective circuit unit (S1, S2, S3, HS) operates in parallel or in series with one or more other circuit units (S1, S2, S3, HS) in compliance with random signals. EFFECT: preventing type-of-process data acquisition by counting current peaks. 10 cl, 6 dwg
申请公布号 RU2216769(C2) 申请公布日期 2003.11.20
申请号 RU20010105928 申请日期 1999.07.27
申请人 INFINEON TEKNOLODZHIZ AG 发明人 RAJNER ROBERT;ZEDLAK KHOL'GER
分类号 G06F12/14;G06F1/00;G06F12/00;G06F21/00;G06F21/06;G06F21/55;G06F21/75;G06K19/07;G06K19/073;H01L21/822;H01L27/04;(IPC1-7):G06F12/00 主分类号 G06F12/14
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