| 摘要 |
<p>1277114 Transistor gating circuits TEXAS INSTRUMENTS Inc 16 July 1969 [9 Sept 1968] 35891/69 Heading H3T [Also in Division H1] Decimal outputs 0-9 of a binary-todecimal decoder 12 are connected through respective driver stages comprising MOSFET/ bipolar transistor pairs such as 30/40 to cathodes 50-59 of an alphanumeric display tube 60. The MOSFETs 30-39 all share a common drain region in an integrated circuit structure (see Division H1) and the source of each is connected to the emitter of one of the bipolar transistors 40-49, all of which share a common base region, e.g. the semi-conductor substrate carrying the entire circuit. The common drain of the MOSFETs 30-39 is connected to a voltage-controlled Eccles-Jordan flip-flop 66. Each decimal output column of the decoder 12 is connected to the drains of four p channel enhancement mode MOSFETs, the gates of which are connected to four of a total of eight binary input lines to four of which, A-D, true binary inputs are supplied, the other four, A-D, receiving complement binary inputs.</p> |
